Addressing Modes

In an earlier post I identified the basic core instruction set. What was not defined was the suite of operands for the instruction set. We'll take a stab at that now.

We need to be able to load and/or operate on a literal value; so we need to have Immediate Addressing. In this mode of addressing the word following the opcode in memory contains the actual operand.

We need the Address Register to know where to store things. It would be nice to be able to manipulate the value stored therein. So let us allow Register Addressing; allowing operations between the Accumulator, the Address Register, and memory.

While I'm at it, given that we need the Address Register, let us add Register Indirect Addressing. This type of addressing allows the Address Register to be used as a pointer to any location in memory (or i/o space). This could be a very powerful addressing mode.

So we have:

LD A, NNNN <- Load Accumulator with literal NNNN

LD A, M <- Load Accumulator with contents of Address Register

LD A, [M] <- Load Accumulator with contents of memory at address pointed to by Address Register

I think that, as is possible, that all permutations should be allowed for all instructions.