The trouble with bytes

I've tried to convince myself that word addressing is best; 64k x 16bits. But you can't get away from the fact that we need data in byte size pieces sometimes. ASCII strings as an example. So, I'm changing my mind yet again (I think that this will be a common feature of this BLOG), the addressing of the machine will be byte aligned, however instructions must be even byte address aligned. Strangely enough, that is how the PDP-11 did it.

So when implementing memory:

1) Ignore bit 0 when addressing memory
2) Organize memory as words
3) Bit 15 indicates byte(1) or word(0) in an opcode
4) When byte only the LSB of register is used
5) Use bit 0 to decide if LSB or MSB of data bus to be used
6) Always fill MSB of register with MS-bit of LSB when loading bytes
7) When writing bytes to memory use bit 0 to determine which byte to latch

I think that should work.

Addressing Modes

In some opcodes there are source and destination fields (SS/DD). These fields are 6 bits wide. The bottom 3 bits (0-2) indicate the register, the top 3 bits (3-5) indicate the addressing mode.

The addressing modes are as follows (all lifted from the PDP-11):

0 - Register contains operand.

1 - Register contains address of operand.

2 - Register is used as a pointer to operand, then the contents of the register are incremented (by 2 for word, 1 for byte).

3 - Register is used as a pointer to the address of the operand, then the contents of the register are incremented by 2 (always).

4 - The register is decremented (by 2 for word, 1 for byte), and then the register is used as a pointer to the operand.

5 - The register is decremented by 2 (always), and then the register is used as a pointer to the address of the operand.

6 - The Index value (stored at PC+2) is added to the address in the register. The sum points to the operand.

7 - The Index value (stored at PC+2) is added to the address pointed to by the register. The sum points to the operand.

I was slightly confused by the lack of immediate loads of addresses and constants etc. However, you don't need special case opcodes as the Program Counter is a general register. After each instruction is decoded the PC is incremented. So the PC points to the memory that contains the immediate data.

So for operations using the Program Pointer (R7):

Mode 2 - Immediate - Operand N follows instruction

Mode 3 - Absolute - Address of operand follows instruction

Mode 6 - Relative - PC + 4 + X is address of operand

Mode 7 - Relative Indirect - PC + 4 + X is address of address of operand

You will note that Mode 5 is the implementation mechanism for the Stack. I know I wasn't going to have a stack but hell why not.